1. Field of the Invention
The present invention relates to a reflective liquid crystal display (LCD), and particularly, to a reflective LCD capable of reducing a leak current produced in switching elements formed on a semiconductor substrate. The leak current is produced when read light that has been emitted to a transparent substrate and made incident to liquid crystals through a counter electrode partly passes through openings formed between adjacent reflective pixel electrodes, penetrates an insulating film adjoining the reflective pixel electrodes, and reaches the switching elements.
2. Description of Related Art
Recently, projection LCDs to display images on large screens are extensively used for, for example, outdoor public displays, control operation displays, and high-resolution image displays conforming to hi-vision broadcast standards and SVGA computer graphics standards.
The projection LCDs are largely classified into transmission LCDs based on a transmission method and reflective LCDs based on a reflection method. The transmission LCDs have a drawback that a TFT (thin film transistor) formed in each pixel is unable to serve as a transmission area to transmit light, and therefore, reduces a numerical aperture. For this reason, the reflective LCDs are attracting attention.
Generally, the reflective LCD employs a semiconductor substrate (Si substrate) on which a plurality of switching elements are formed and electrically isolated from one another. Over the switching elements, a plurality of functional films are formed one upon another. On a top one among the functional films, a plurality of reflective pixel electrodes are formed and electrically isolated from one another. The reflective pixel electrodes correspond to the switching elements, respectively. One switching element, one reflective pixel electrode connected to the switching element, and a storage capacitor provided for the switching element are grouped to form a pixel. Such pixels are arranged in a matrix on the semiconductor substrate. Facing the reflective pixel electrodes, a transparent counter electrode commonly serving for all pixels is formed on the reverse of a transparent substrate (glass substrate). Between the reflective pixel electrodes and the counter electrode, liquid crystals are sealed to form the reflective LCD. From the transparent substrate side, color-image read light is made incident through the counter electrode to the liquid crystals. At the same time, the switching elements change potential differences of the corresponding reflective pixel electrodes relative to the counter electrode in response to image signals, to control orientation of the liquid crystals, modulate and reflect the color-image read light, and emit the light from the transparent substrate.
FIG. 1 is an enlarged sectional view schematically showing a pixel in a reflective LCD according to a related art 1. FIG. 2A is a block diagram explaining an active-matrix drive circuit in the reflective LCD of the related art 1, and FIG. 2B is an enlarged schematic view showing a part X of FIG. 2A.
The reflective LCD 10A of the related art 1 of FIG. 1 is designed for a standard reflective projector. Among a plurality of pixels of the LCD 10A to display images, one pixel will be explained with reference to the enlarged views. A semiconductor substrate 11 serving as a base of the LCD is a p-type Si substrate (or an n-type Si substrate) made of monocrystalline silicon. At the left side of the semiconductor substrate (hereinafter referred to as p-type Si substrate) 11 in FIG. 1, a p-well region 12 is formed and is electrically isolated pixel by pixel with the use of left and right field oxide films 13A and 13B. Within the p-well region 12, a switching element 14 is formed, which is a MOSFET (metal oxide semiconductor field effect transistor).
The switching element (hereinafter referred to as MOSFET) 14 has a gate G consisting of a gate oxide film 15 approximately formed at the center of the surface of the p-well region 12 and a gate electrode 16 made of polysilicon on the gate oxide film 15.
On the left side of the gate G of the MOSFET 14 in FIG. 1, a drain region 17 is formed, and on the drain region 17, a drain electrode 18 is formed from aluminum wiring in a first via hole Via1, to constitute a drain D.
On the right side of the gate G of the MOSFET 14 in FIG. 1, a source region 19 is formed, and on the source region 19, a source electrode 20 is formed from aluminum wiring in a first via hole Via1, to constitute a source S.
On the right side of the p-well region 12 in the p-type Si substrate 11 in FIG. 1, a diffused capacitor electrode 21 is formed by ion implantation. The diffused capacitor electrode 21 is electrically isolated pixel by pixel with the use of the left and right field oxide films 13B and 13C. A range from the field oxide film 13A to the field oxide film 13C corresponds to a pixel.
On the diffused capacitor electrode 21, an insulating film 22 and a capacitor electrode 23 are formed in this order. On the capacitor electrode 23, a capacitor electrode contact 24 is formed from aluminum wiring in a first via hole Via1, to constitute a storage capacitor C for the MOSFET 14.
Over the field oxide films 13A to 13C, gate electrode 16, and capacitor electrode 23, functional films including a first interlayer insulating film 25, a first metal film 26, a second interlayer insulating film 27, a second metal film 28, a third interlayer insulating film 29, and a third metal film 30 are formed one upon another in this order.
The first, second and third interlayer insulating films 25, 27, and 29 are formed from, for example, SiO2 (silicon oxide) having an insulating ability.
The first, second, and third metal films 26, 28, and 30 are made of, for example, conductive aluminum wiring and are segmented into predetermined patterns corresponding to pixels, i.e., the switching elements 14, respectively. Within one pixel, the first, second, and third metal films 26, 28, and 30 are electrically connected to each other. The first, second, and third metal films 26, 28, and 30 in a given pixel are electrically isolated from those in any adjacent pixel with openings 26a, 28a, and 30a formed in the metal films 26, 28, and 30 between adjacent pixels.
In each pixel, the lowermost first metal film 26 is connected to the corresponding switching element 14 and storage capacitor C through the drain electrode 18, source electrode 20, and capacitor electrode contact 24 that are formed from aluminum wiring filled in the first via holes Via1 etched in the first interlayer insulating film 25.
In each pixel, the intermediate second metal film 28 serves as a light blocking metal film to block part of read light L made incident to an upper transparent substrate 42 (to be explained later) from reaching the MOSFET 14 formed under the metal film 28 on the p-type Si substrate 11. Namely, the second metal film (light blocking metal film) 28 is formed to cover an opening 30a formed between adjacent metal films 30 formed over the film 28 and block part of read light L entering the opening 30a. The second metal film 28 is connected to the lowermost first metal film 26 through the aluminum wiring filled in the second via hole Via2 etched in the second interlayer insulating film 27. In some embodiments, as shown in FIGS. 4 and 12, the light blocking metal film 28 is divided into a first portion 91 and a second portion 92 by an annular-type opening 28a, which is bound on its interior edge by the first portion 91 and is in turn bound on its exterior edge by the second portion 92. Opening 28a thus electrically isolates the first portion 91 from the second portion 92.
In each pixel, the top third metal film 30 is formed as a square reflective pixel electrode for the pixel. The metal film 30 is separated from any adjacent one by the opening 30a formed between them and is connected to the intermediate second metal film 28 through aluminum wiring filled in a third via hole Via3 etched in the third interlayer insulating film 29.
On the third metal film (hereinafter referred to as reflective pixel electrode) 30, liquid crystals 40 are sealed. On the liquid crystals 40, a transparent counter electrode 41 is formed on the reverse of the transparent substrate (glass substrate) 42, to face the reflective pixel electrodes 30. The counter electrode 41 serves as a common electrode for the reflective pixel electrodes 30, and therefore, is not segmented into pixels. The counter electrode 41 is made of, for example, ITO (indium tin oxide).
The active-matrix drive circuit to drive a matrix of the MOSFETs (switching elements) 14 arranged on the p-type Si substrate 11 in the reflective LCD 10A according to the related art 1 will be explained with reference to FIGS. 2A and 2B.
In FIGS. 2A and 2B, the active-matrix drive circuit 70 of the reflective LCD 10A drives a matrix of the MOSFETs (switching elements) 14 arranged on the p-type Si substrate (semiconductor substrate) 11. A set of the MOSFET 14, reflective pixel electrode 30 connected to the MOSFET 14, and storage capacitor C for the MOSFET 14 forms a pixel, and a set of such pixels is arranged in a matrix on the p-type Si substrate 11.
To specify one of the pixels, a horizontal shift register circuit 71 and a vertical shift register circuit 75 are arranged in column and row directions, respectively.
For each column of pixels, the horizontal shift register circuit 71 has a video switch 72 and a signal line 73 vertically extended from the video switch 72. For the sake of convenience, FIG. 2A shows only one signal line 73 connected to the horizontal shift register circuit 71. Between the horizontal shift register 71 and the video switch 72, the signal line 73 is connected to a video line 74. The signal line 73 is also connected to the drain electrodes 18 of the MOSFETs 14 that are in the column for which the signal line 73 is provided.
For each row of pixels, the vertical shift register circuit 75 has a gate line 76 horizontally extended. For the sake of convenience, FIG. 2A shows only one gate line 76 extended from the horizontal shift register circuit 75. The gate line 76 is connected to the gate electrodes 16 of the MOSFETs that are in the row for which the gate line 76 is provided.
The source electrode 20 of each MOSFET 14 is connected to corresponding one of the reflective pixel electrodes 30 and corresponding one of the storage capacitors C, more precisely, the capacitor electrode contact 24 and capacitor electrode 23 of the storage capacitor C. The active-matrix drive circuit 70 employs a known inversion driving method that inverts the polarity of video signals between positive and negative frame by frame. For example, video signals to be written in an “n”th frame are provided with positive polarity and those to be written in an “n+1”th frame are provided with negative polarity. To supply a video signal through the signal line 73, the signal line 73 must be connected to one of the drain electrode 18 and source electrode 20 of the MOSFET 14. In this example, the signal line 73 is connected to the drain electrode 18 as mentioned above. If the signal line 73 is connected to the source electrode 20, the drain electrode 18 is connected to the reflective pixel electrode 30 and the capacitor electrode contact 24 and capacitor electrode 23 of the storage capacitor C.
In the reflective LCD 10A according to the related art 1, a fixed well potential is supplied to the MOSFET 14, and a fixed common potential COM is supplied to the storage capacitor C.
The well potential to the MOSFET 14 is fixed to, for example, 15 V and is supplied between the gate line 76 and a well potential contact on a p+region (not shown) formed in the p-well region 12 (FIG. 1). If an n-type Si substrate is employed, the well potential is, for example, 0 V.
The common potential COM to the storage capacitor C is fixed to, for example, 8.5 V and is supplied between the capacitor electrode 23 of the storage capacitor C and a common potential contact (not shown) on the diffused capacitor electrode 21. The common potential COM can basically be of any voltage to form the storage capacitor C. It may be set to a center value (for example, 8.5 V) of video signals, to make the voltage applied to the storage capacitor C about half a source voltage. Namely, a storage capacitor withstand voltage is about half a source voltage. It is possible, therefore, to thin the film thickness of only the insulating film 22 of the storage capacitor C, to increase a capacitance value. Larger the storage capacitance value of the storage capacitor C, the smaller a potential change the reflective pixel electrode 30 receives. This is advantageous in preventing flickering and burning.
The storage capacitor C stores charge in accordance with a potential difference between a potential applied to the reflective pixel electrode 30 and the common potential COM, keeps the stored voltage during an unselected period or OFF period of the MOSFET 14, and continuously applies the stored voltage to the reflective pixel electrode 30.
To drive a pixel, the active-matrix drive circuit 70 of the reflective LCD 10A according to the related art sequentially supplies video signals to the video line 74 at shifted timing. One of the video signals is supplied to the columnar signal line 73 through the video switch 72. At this time, a MOSFET 14 located at an intersection of the signal line 73 and a selected gate line 76 is turned on.
The video signal is supplied to the reflective pixel electrode 30 of the selected MOSFET 14 through the signal line 73 and is written as charge into the storage capacitor C. This results in causing a potential difference between the selected reflective pixel electrode 30 and the counter electrode 41 (FIG. 1) according to the video signal and modulates the optical characteristic of the liquid crystals 40. As a result, color-image read light L (FIG. 1) emitted to the transparent substrate 42 is modulated by the liquid crystals 40 pixel by pixel, is reflected by the reflective pixel electrodes 30, and is emitted from the transparent substrate 42. Unlike the transmission LCD, the reflective LCD can utilize read light L (FIG. 1) nearly 100% to provide high-resolution, high-luminance projection images.
At this time, as shown in FIG. 1, part of the color-image read light L entering the transparent substrate 42 penetrates the third interlayer insulating film 29 through the openings 30a formed between adjacent reflective pixel electrodes 30. The penetrated light is repeatedly reflected in the third interlayer insulating film 29 between the reverses of the reflective pixel electrodes (third metal films) 30 made of aluminum wiring and the surfaces of the light blocking metal films (second metal films) 28 made of aluminum wiring. Thereafter, the repeatedly reflected light penetrates the second interlayer insulating film 27 through the openings 28a where no light blocking metal film 28 is formed. In the second interlayer insulating film 27, the light is repeatedly reflected between the reverses of the light blocking metal films 28 made of aluminum wiring and the surfaces of the first metal films 26 made of aluminum wiring. Thereafter, the repeatedly reflected light penetrates the first interlayer insulating film 25 through the openings 26a where no first metal film 26 is formed. Each opening 26a where no first metal film 26 is formed is located above the gate electrode 16 of the MOSFET 14 or the capacitor electrode 23 of the storage capacitor C, so that the part of the read light L penetrated the first interlayer insulating film 25 reaches the gate electrode 16, drain region 17, and source region 19 of the MOSFET 14 or the capacitor electrode 23 of the storage capacitor C.
If part of the read light L penetrates the drain region 17 and source region 19 of the MOSFET 14, a photodiode function works because there are pn junctions between the p-well region 12 and the drain region 17 and source region 19 that are made of high-concentration n+impurity layers in the MOSFET 14. As a result, the part of the read light L generates photocarriers to cause a leak current, which may vary the potential of the reflective pixel electrode 30. The variation in the potential of the reflective pixel electrode 30 may cause flickering and burning. It is necessary, therefore, to minimize light leakage to the MOSFET 14 caused by part of the read light L.
An LCD employing a technique of suppressing light leakage to a MOSFET due to part of read light L is disclosed in, for example, Japanese Unexamined Patent Application Publication No.2002-40482.
FIG. 3 is a sectional view schematically showing an LCD according to a related art 2.
The LCD 100 according to the related art 2 of FIG. 3 is the one disclosed in the above-mentioned publication No.2002-40482. With reference to the publication, the LCD 100 will briefly be explained.
In FIG. 3, the LCD 100 according to the related art 2 employs a first substrate (drive circuit substrate) 101 on which a plurality of active elements 102 are formed. Each active element 102 consists of a gate electrode 103, a drain region 104, and a source region 105. The drain and source regions 104 and 105 are formed on the left and right sides of the gate electrode 103, respectively. The active element 102 is electrically isolated from adjacent active elements 102 by left and right field oxide films 107 that are continuous to an insulating film 106.
On the active element 102, functional films including a first interlayer film 108, a first conductive film 109, a second interlayer film 110, a first light blocking film 111, a third interlayer film 112, a second light blocking film 113, a fourth interlayer film 114, and a second conductive film (hereinafter referred to as reflective electrode) 115 serving as a reflective electrode are formed one upon another in this order.
The first conductive film 109, first light blocking film 111, second light blocking film 113, and reflective electrode 115 are conductive and are sectioned into predetermined patterns to serve for the active elements 102, respectively.
The first conductive film 109 is connected to the drain region 104 and source region 105 of the active element 102 through first via holes Via1 formed in the first interlayer film 108. The first light blocking film 111 must be provided with a second via hole Via2 indicated with an imaginary line outside FIG. 3, to apply a voltage thereto. The second light blocking film 113 is connected to the first conductive film 109 through a third via hole Via3 formed in the second and third interlayer films 110 and 112. The reflective electrode 115 is connected to the second light blocking film 113 through a fourth via hole Via4 formed in the fourth interlayer film 114. Accordingly, the reflective electrode 115 is connected to the corresponding active element 102 through the second light blocking film 113 and first conductive film 109.
On the reflective electrodes (second conductive films) 115, an aligning film 116, a liquid crystal composition 117, an aligning film 118, a counter electrode 119, and a second substrate (transparent substrate) 120 are formed in this order. The liquid crystal composition 117 is partitioned by left and right spacers 121 for each reflective electrode 115 (pixel).
The spacer 121 is positioned on an opening 115a formed between adjacent reflective electrodes 115. The second light blocking film 113 has substantially the same size as the reflective electrode 115 and is formed to cover the opening 115a. The first light blocking film 111 is formed to cover an opening 113a formed between adjacent second light blocking films 113. Part of read light L made incident to the second substrate (transparent substrate) 120 may penetrate the fourth interlayer film 114 through the opening 115a formed between adjacent reflective electrodes 115. The penetrated light is blocked by the first and second light blocking films 111 and 113, so that the light may not reach the active elements 102 formed on the first substrate 101. In this way, this disclosure suppresses light leakage to the active elements 102 due to the penetration of part of read light L.
According to the LCD 100 of the related art 2, a voltage is applied to the first light blocking film 111, and the first light blocking film 111, third interlayer film 112, and second light blocking film 113 form a capacitor. When a voltage applied to the reflective electrode 115 is changed relative to the potential of the counter electrode 119, the reflective electrode 115, liquid crystal composition 117, and counter electrode 119 form a first capacitor, and the first light blocking film 111, third interlayer film 112, and second light blocking film 113 form the second capacitor mentioned above.
This configuration prevents unnecessary light incident to the liquid crystal display elements and realizes a high-quality LCD and a liquid-crystal projector employing the LCD, as stated in the disclosure.
According to the reflective LCD 10A of the related art 1 of FIG. 1, part of color-image read light L made incident to the transparent substrate 42 reaches the MOSFETs 14 formed on the p-type Si substrate 11. Namely, light leakage occurs.
According to the reflective LCD 100 of the related art 2 of FIG. 3, the second light blocking film 113 is formed under the reflective electrodes 115, to cover the opening 115a formed between the adjacent reflective electrodes 115. In addition, the first light blocking film 111 is formed under the second light blocking films 113, to cover the opening 113a formed between the adjacent light blocking films 113. This arrangement prevents part of read light L made incident to the second substrate (transparent substrate) 120 from reaching the active elements 102 formed on the first substrate 101. Namely, no light leakage occurs. However, when forming, over the first substrate 101, the first conductive film 109, second interlayer film 110, first light blocking film 111, third interlayer film 112, second light blocking film 113, fourth interlayer film 114, and reflective electrode (second conductive film) 115 in this order, a process of forming the first via holes Via1 for the first conductive film 109, a process of forming the second via holes Via2 for the first light blocking film 111, a process of forming the third via holes Via3 for the second light blocking film 113, and a process of forming the fourth via holes Via4 for the reflective electrode (second conductive film) 115 must be carried out. The increased number of the via hole forming processes elongates the manufacturing time of the LCD 100 and deteriorates the yield thereof.